With the increasing size of large scale integrated circuit chips, the number of input and output connections that have to be made to a die chip has correspondingly increased. This trend has encouraged the evolution from dual in-line chip packages, which have two parallel rows of connection pins, to smaller and more dense leadless chip packages. In this arrangement, a die chip as carried by a leadless chip carrier is surface mounted onto a generally larger printed circuit (PC) board or other ceramic substrates. The chip carrier is surface mounted by placing it on top of corresponding PC board contact pads which mirror those contact pads of the chip carrier. An electrical and mechanical connection is then made by soldering the chip carrier to this generally larger board by reflow soldering. This arrangement is less cumbersome than mounting dual in-line packages onto a board and allows greater density of input and output connections. Leadless chip carriers generally consist of a package containing a substrate of ceramic which forms a or base onto which an IC chip is mounted. A conductive chip paddle portion is formed on the ceramic base of the chip carrier upon which the IC chip is placed. The chip paddle portion in addition to providing electrical ground path also provides a thermal conduction path for the IC chip. External contact pads formed around the four sides of the ceramic substrate are wire bonded to IC chip pads which are positioned on the top side of the IC chip. During wire bonding process, very thin wires may manually or automatically be placed between the chip pads and the external contacts to provide the electrical connections.
Conventionally, conductive patterns which form the chip paddle portion and the external contacts of the chip carrier have very smooth gold surfaces. The gold surfaces are formed by disposing a gold layer on a nickel layer which is disposed on top of a copper layer formed on the ceramic base of the chip carrier. The chip carrier is attached to the IC chip by depositing a layer of conductive or non-conductive bonding epoxy between the smooth gold surface of the chip paddle portion and the bottom side of the IC chip. However, the smooth gold surface of the die paddle does not provide a strong bonding surface for the bonding epoxy. Generally, smooth gold surface provide a poor adhesion between the bonding epoxy and the die paddle which may cause the IC chip to be detached from the chip carrier due to thermal excursions caused by soldering.